1. Field of the Invention
This invention relates to an automatic level controlling (ALC) circuit for controlling an output signal to a stable level even when the level of an input signal such as an audio signal is high.
2. Description of the Related Art
Generally, sound in the external environment includes a faint sound and loud sound. In the processing of an audio input signal, since it is necessary to assure a wide dynamic range, when the level of the audio input signal is high, it was controlled to a stable level by an automatic level controlling circuit. In a digital video camera which has spread in recent years, making a low voltage operation has been attempted for reduction of power consumption. It has been demanded for the characteristic of the automatic level controlling circuit to be improved to assure a wide dynamic range.
FIG. 4 is a circuit diagram of a conventional automatic level controlling circuit. In FIG. 4, reference numeral 10 denotes an input terminal to which an input signal is supplied; 11 an amplifying circuit for amplifying the input signal; 12 a full-wave rectifying circuit for full-wave rectifying an output from the amplifying circuit; 13 a buffer amplifier; and 14 a detecting terminal to which a capacitor 15 is externally attached. The full-wave rectifying circuit 12 and the capacitor 15 connected to the detecting terminal 14 constitute a detecting circuit. Reference numeral 16 denotes a comparing circuit for comparing a detected voltage Vo appearing at the detecting terminal 14 and a reference voltage Vref from a DC power source. The comparing circuit 16 produces a controlling voltage for controlling the gain of the amplifying circuit 11 according to a comparison result, thereby controlling the level of the output signal therefrom.
FIG. 5 is an input/output characteristic graph of the automatic level controlling circuit having the configuration described above. As seen from FIG. 5, in the absence of the automatic level controlling circuit, the output signal exceeds a saturated level Vs when the level of the input signal exceeds V1, and hence is clipped. On the other hand, in the presence of the automatic level controlling circuit, it restrains the level of the output signal when the level of the input signal reaches V2 so that clipping of the output signal can be prevented.
The characteristic of the automatic level controlling circuit is characterized by not only the above input/output characteristic but also the transient response characteristic when the level of the input signal has changed abruptly, i.e. attack/recovery characteristic.
FIGS. 6A and 6B are waveform charts for explaining the attack characteristic. As seen from FIG. 6A, when the level of the input signal rises abruptly at a time t1, it is amplified instantaneously with a full gain. Then, as seen from FIG. 6B, the level of the output signal is clipped. However, the level is attenuated gradually through the automatic level controlling operation. In this case, the time taken to reach the stable level, or the time taken until the clipping of the level of the output signal is canceled is called xe2x80x9cattack time TAxe2x80x9d. The attack time is controlled by a CR time constant of the detecting circuit.
FIGS. 7A and 7B are waveform charts for explaining the recovery characteristic. As seen from FIG. 7A, it is assumed that the level of the input signal has decreased abruptly at time t3. Then, as seen from FIG. 7B, it takes a time for the level of the output signal to restore to the ordinary recovery time (t4). This time is called xe2x80x9crecovery time TRxe2x80x9d. In this case, a current flows through a discharging current path (not shown) so that the detected voltage Vo at the detecting terminal decreases.
Where the sensitivity of the automatic level controlling circuit is high (i.e. attack/recovery time is short), the distortion of the output signal increases. On the other hand, where the sensitivity is low (i.e. attack/recovery time is long), the output signal disappears for certain period. In this way, the performance of the automatic level controlling circuit is defined by various attack/recovery characteristics.
FIG. 8 is a circuit diagram showing the circuit configuration for setting the attack time and recovery time of the automatic level controlling circuit. In FIG. 8, the output from the full-wave rectifying circuit 12 shown in FIG. 4 is applied to a buffer amplifier 19, and the output from the buffer amplifier 19 is applied to the base of an NPN-type transistor Q1. The one end of a resistor R is connected to the emitter of the NPN-type transistor Q1. The other end of the resistor R is connected to a detecting terminal 14. The detected voltage Vo which appears at the detecting terminal 14 is applied to a buffer amplifier 21. The output from the buffer amplifier 21 is applied to a comparing circuit 16.
In the circuit configuration described above, the attack time is set by the charging time constant of the resistor R and capacitor 15. FIGS. 9A and 9B are waveform charts showing the attack characteristic when the input signal is switched from no signal into the signal in a middle level (hereinafter referred to as a middle input signal). The attack time is set at so short a time that as seen from FIG. 9A, when the input signal is switched from no signal into the middle input signal at time t1, as seen from FIG. 9B, the level of the output signal is converged instantaneously. In other words, the period while the level of the output signal is clipped is set at a short time.
FIGS. 10A to 10C are graphs showing the attack characteristic when the input signal is switched from the middle input signal into an input signal in a high level (hereinafter referred to a high input signal). Now, as seen from FIG. 10A, it is assumed that the input signal has switched from the middle input signal into the high input signal at time t2. The waveform in the portion encircled by broken line is shown in an enlarged manner on the right side (also in FIGS. 10B and 10C). In this case, as seen from FIG. 10B, since the ability of limiting the signal level is too strong, the attack time becomes too short in the signal in which the switching between the middle input signal and the high input signal is to be repeated frequently. This gave rise to signal distortion. Particularly, in the case of a sound signal, the signal distortion led to an unpleasant phenomenon of xe2x80x9csound breakagexe2x80x9d.
In order to obviate such an inconvenience, with respect to the attack characteristic of switching the input signal from the middle input signal into the high input signal, the attack time must be set as shown in FIG. 10C so that slight distortion component remains instantaneously, but the output signal is thereafter limited gradually.
However, in the circuit configuration shown in FIG. 8, since the attack time is defined by the charging time constant of the resistor R and capacitor 15, that when the input signal is switched from the middle input signal into the high input signal could not set at a long time.
This invention has been accomplished in view of the inconvenience of the prior art described above.
An object of this invention is to provide an automatic level controlling circuit in which attack times when an input signal is switched from no signal into a middle input signal and when it is switched from the middle input signal into a high input signal can be set at optimum times, respectively, thereby solving the problem of xe2x80x9csound breakagexe2x80x9d of a sound signal.
In order to attain the above object, in accordance with this invention, there is provided an automatic level controlling circuit for controlling an output from an amplifying circuit to a stable level when an input signal exceeding a prescribed level is received, comprising: a first and a second time constant circuit for setting an attack time for the automatic level controlling circuit; a comparing circuit for comparing output levels in the first and the second time constant circuit with a reference voltage; and an amplifying circuit for controlling an output signal level according to a control voltage produced from the comparing circuit, wherein the first time constant circuit has a smaller time constant than that of the second time constant and is operated according to a level of the input signal so that the attack time is variably set.
In this configuration, in the attack in the switching from no signal into a middle signal, the first time constant circuit having a small time constant operates so that the attack time is set. In this case, since the second time constant circuit has a large time constant, even when it operates, the attack time is substantially defined by the first time constant circuit.
On the other hand, in the attack in the switching from the middle signal into a high signal, the first time constant circuit is not operated so that a long attack time is set by the second time constant circuit having a large time constant. This permits the problem of sound breakage to be solved.
Preferably, the first and the second time constant circuit each includes a capacitor and a resistor for charging, and the capacitor is commonly used for the first and the second time constant circuit. Such a configuration permits the number of circuit elements to be reduced.
Preferably, the first time constant circuit includes: a differential amplifying circuit having a first differential transistor to which a prescribed DC level is applied and a second differential transistor to which an output from the amplifying circuit is applied; a first output transistor which is driven by an output from the differential amplifying circuit; a first output resistor connected to the first output transistor; and the capacitor connected to the first output resistor. In this arrangement, when an output level of the amplifying circuit is higher than the DC level, the capacitor is charged.
When the output from the amplifying circuit exceeds a prescribed DC level, the output transistor turns on according to the output from the differential amplifying circuit. Therefore, the attack time is set by the time constant defined by the first output resistor and capacitor.
Preferably, the second time constant circuit includes: a buffer amplifier; a second output transistor which is driven by the buffer amplifier; a second output resistor connected to the output transistor; and the capacitor connected to the second output resistor.
In this configuration, the second time constant circuit can be constructed which has a time constant defined by the second output resistor and capacitor and always operates irrespectively of the level of the input signal.
In a preferred embodiment, a composite impedance of the second output transistor and the second output resistor is larger than that of the first output transistor and the first output resistor.
In this configuration, the second time constant circuit always operates irrespectively of the level of the input signal and a composite impedance of the second output transistor and the second output resistor is larger than that of the first output transistor and the first output resistor. Therefore, when the first time constant circuit is operated according to the level of the input signal, the attack time is substantially set by the first time constant circuit. When the first time constant circuit does not operate, the attack time is set the time constant defined by the second output resistor and the capacitor in the second time constant circuit.
The above and other objects and features of this invention will be more apparent from the following description taken in conjunction with the accompanying drawings.